I’m Bohan Zhang (aka baihuaDaDa), a second-year undergraduate student from ACM Honor Class at Zhiyuan College, Shanghai Jiao Tong University (SJTU). I am interested in computer science, especially in the fields of large language model and machine learning system. I am currently working at SJTU System Wisdom Lab (SysdomLab), mentored by Doc. Chen Chen, associate professor in John Hopcroft Center for Computer Science at SJTU.

News

Projects

Mx Compiler

A Compiler from Mx language (which is a C++ & Java like language but simplified) to RV32I Assembly via LLVM-IR. Several optimizations have been implemented: Mem2Reg, Linear Scan Register Allocation, Global2Local, Function Inlining, Global Code Motion, Aggressive Dead Code Elimination.

RISC-V_32 CPU

A Tomasulo RISC-V CPU with iCache and branch predictor with 2-bit saturating counter. The architecture design can be successfully implemented on FPGA board.

Distributed Hash Table

Two distinct distributed hash table protocols are implemented in this project: Chord and Kademlia. Both protocols aim to provide efficient, scalable, and fault-tolerant systems for storing and retrieving (key, value) pairs across a distributed network of nodes.

Honors