I’m Bohan Zhang (aka baihuaDaDa), a fourth-year undergraduate student from ACM Honor Class at Zhiyuan College, Shanghai Jiao Tong University (SJTU), expected to graduate in June, 2027. I am interested in computer science, especially in the fields of machine learning system, especially parallel and distributed computing. I am currently working as a research intern at Han-Lab of MIT, supervised by Doc. Yukang Chen and Prof. Song Han. I am also working at SJTU System Wisdom Lab (SysdomLab), mentored by Prof. Chen Chen, associate professor in John Hopcroft Center for Computer Science at SJTU.

News

Representative Systems

LongLive-2.0

An FP4/NVFP4 long-video generation infrastructure with Balanced SP, teacher-forcing layout co-design, W4A4 inference, KV cache compression, parallel dequantization, and asynchronous streaming VAE decoding. The project is now open-sourced by NVIDIA on Github, gaining over \textbf{2k stars}.

I worked on inference infra part of the system, including KV cache compression, SP Parallelism and asynchronous streaming VAE decoding, improving both speed and memory.

Personal Projects

Mx Compiler

A Compiler from Mx language (which is a C++ & Java like language but simplified) to RV32I Assembly via LLVM-IR. Several optimizations have been implemented: Mem2Reg, Linear Scan Register Allocation, Global2Local, Function Inlining, Global Code Motion, Aggressive Dead Code Elimination.

RISC-V_32 CPU

A Tomasulo RISC-V CPU with iCache and branch predictor with 2-bit saturating counter. The architecture design can be successfully implemented on FPGA board.

Distributed Hash Table

Two distinct distributed hash table protocols are implemented in this project: Chord and Kademlia. Both protocols aim to provide efficient, scalable, and fault-tolerant systems for storing and retrieving (key, value) pairs across a distributed network of nodes.

Honors